I supervise several PhD and MSc. students. They are:


PhD Students



Past PhD Students

Tao Xu, Wireless Transceiver Design For High Velocity Scenarios, Jan 2013


Sumeet Kumar, Thermal-Aware Design and Runtime Management of 3D Stacked Multiprocessors, Sept 2015


Mu Zhou, Blind Beamforming Techniques for Global Tracking Systems, Dec 2015


MSc. Students
Wim Kok(EE) [Aug 2023]


Neeraj Mandloi

Past Postdocs
Derek Japan Carlo Galuzzi Sumeet Kumar Amir Zjajo Micheal Berkelaar Shashanka Johan Mes Inayat Ullah Ercan Kalali David Aledo Ortega
Scientific Programmers

Past MSc. Students

Yiyin Wang, (ME), System Design Methodologies - High Level Synthesis and A VHDL Implementation of a Practical Scheme for UWB Communication,

April 2005


Jianwei Wang, (PRG), Hardware/Software Codesign of MP3 Decoder with 36/32-point (I)DCT Accelerators, July 2005

Mian Qin, (ME), A Fast and Low Cost SIMD Architecture for Fingerprint Image Enhancement, October 2005

Yu Du, (PRG), A SOC Implementation of Ogg Audio Player using MicroBlaze, Oct-05

Bas Bijlsma, (ME), Asynchronous Network-on-Chip Communication Architecture Performance Analysis, October 2005


Ramesh Chidambaram, (ME), A scalable and high-performance FFT processor, optimized for UWB-OFDM, July 2005


Jia Chen, (CE), An Advanced Cache Power Model for An Embedded Processor using SLEEP Methodology, June 2006

Han Wang, (CE), LT Codes for Reliable Network-on-Chip Communications, July 2006

Xiaolu Zhao, (CE), Real-time Operating System Oriented Dynamic Voltage Scaling, July 2007

David Casanovas, (CE), Power/energy usage of short distances inter-FPGA high throughput communication, November 2007

Michel van der Net, (CE), A SoC Solution for Fingerprint Minutiae Extraction, July 2008

Robert Wahyudi, (PRG), Generic JTAG-Based On-Chip Debug System, July 2008

Yago Rodriquez Mandado, (PRG), Hardware and algorithm study for a fingerprint verification system, December 2008

Snehal Raut, (ME), Semi-custom VLSI Design and Realization of DC-DC Converters in UMC90, February 2009

Jose Moar Gomez, (ME), 90 nm VLSI Design of an 8-bits Microcontroller, February 2009

Tamar Kranenburg, (CE), Design of a Portable and Customizable Microprocessor for Rapid System Prototyping, September 2009

Gert-Jan Schoneveld, (CE), VHDL to SystemC: The Design of a Translator, August 2009


Michael Simmonds, (CE), Desynchronization Methods for Scheduled Circuits, November 2009


Tim Hurkmans, (CE), System Performance Analysis and Fixed-Point Architecture of a Gradient-Based Optical Flow Algorithm, December 2009

Daoxin Li, (ME), Specification and Design a DMA Controller in a Network on Chip System, February 2010

Rick van der Sluijs, (CE), Hardware Implementation of Digital Signal Processing Algorithms for Long Distance Pipeline Inspections, June 2010

Kotaro Kobayashi, (ME), Implementation of Power-Aware Fault-Tolerant System on Custom Reconfigurable Platform, August 2010

Martijn Verschoor, (ES), Design of a Crypto Core for Securing Intra System-on-Chip Communication, October 2010

Tom van Leeuwen, (ME), Implementation and automatic generation of asynchronous scheduled dataflow graph, October 2010

Sumeet Kumar, (ME), TMFab: A Transactional Memory Fabric for Chip Multiprocessors, November 2010

Harry Broeders, (ES), Extracting Behavior and Dynamically Generated Hierarchy from SystemC Models, December 2010


Martha Alvarez Guede, (CE), Optimization of the Belief Propagation algorithm for Luby Transform decoding over the Binary Erasure Channel, February 2011

Kezheng Ma, (ME), A Fast and Accurate SystemC / SystemC-AMS Model for Super-Regenerative Radio, June 2011

Yi Guanyu, (ME), High-Definition Video Real-Time Stereo Matching on FPGA, August 2011

Ren Xianli, (ME), Hardware implementation of an Optical Flow algorithm (Lucas) using the Catapult C High-Level Synthesis tool, August 2011

Radhika Jagtap, (ME), A Methodology for Early Exploration of TSV Interconnects in 3D Stacked ICs, September 2011

Chris Feenstra, (ES), A Memory Access and Operator Usage Profiler Framework for HLS Optimization, December 2011

Arnica Aggarwal, (ME), Temperature-Constrained Power Management Scheme for 3D MPSoC, December 2011

Martin Molenaar, (CE), A FPGA Implementation of a Real-Time Inspection System for Steel Roll Imperfections, January 2012

Anastasios, (Tasos) Michos(CE), A Novel Concurrent Validation Scheme for Hardware Transactional Memory, May 2012

Dmitry Burlyaev, (ES), System-level Fault-Tolerance Analysis of Small Satellite On-Board Computers, June 2012

Pim Tamerus, (CE), Asynchronous logic as counter measure against Power Analysis Attacks, Aug 2012

Mitzi Tjin A Djie, (CE), MP-MAS: A Message Passing Multiprocessor Array for Streaming Applications, Sept 2012

Anupam Chahar, (ES), Compile Time Analysis for Hardware Transactional Memory Architecture, Sept 2012

Anton Delawari, (ES), Time Synchronization in Wireless Sensor Networks, April 2013

Martijn van Eijk, (CE), Modeling of Olivocerebellar Neurons using SystemC and High-Level Synthesis, March 2014

Milovan Vasic, (ME), Physical design of a 3D router: reducing the number of vertical connections and enabling asynchronous operation, May 2014

Jaco Hofmann, (ES), Multi-chip dataflow architecture for massive scale biophysically accurate neuron simulation, Aug 2014

Jurrien de Klerk, (ES), CacheBalancer: A communication latency and utilization aware resource manager, Sept 2014

Dongni Fan, (CE), Guaranteed Quality ECG Signal Compression Algorithm, Sept 2014

Wouter van Teijlingen (CE), Determining Performance Boundaries and Automatic Loop Optimization of High-Level System Specifications, Nov 2014

Kiki Wirianto (ME), Multi-Domain SystemC Model of a Neural Interface, Jan 2016

Giannoula Ioanna Kyriakou (CE), Design and Characterization of the Time Division Multiplexing concept on a dual clock Imaging DSP, Oct 2016

Christopher Mc Girr(ES), Validation of Performance Estimation, FIFO Sizing and Automatic Loop Transformations of High Level Specifications for Polyhedral Process Network Applications, Nov 2016

Jan Christiaanse(ES), A Real-Time Hybrid Neuron Network for Highly Parallel Cognitive Systems, Dec 2016

Mohammad Ahmadinia (CE), Integrating a Neuron Network application into ZYBO Zynq-7000 development board with AXI-Bus interface, Jun 2017

Evelyn Rashmi Jeyachandra (ME) , An Accurate System-Level Device Aging Assessment and Mitigation Simulation Framework, Jul 2017

Haipeng Lin(CE) , Digital Neuron Cells for Highly Parallel Cognitive Systems, Aug 2017

Ester Stienstra (ME) , A 32 x 32 Spiking Neural Network System On Chip, Aug 2017

Xuefei You(ME) , Full-Custom Multi-Compartment Synaptic Circuits in Neuromorphic Structures, Aug 2017

Zhang He (ME) , Multi-FPGA Interconnection Simulation, Aug 2017

Shizhao Zhang (ME) , Source-Synchronous Interface with All-Digital Data Recovery, Aug 2017

Ayush Joshi (ES), Embedded Real Time Partial Discharge Pulse Feature Extraction, Nov 2017

Ardelean Andrei (CE), Energy-efficient multipath ring network for heterogeneous clustered neuronal arrays, Nov 2017

Eralp Kolagasioglu (CE), Energy Efficient Feature Extraction for Single-Lead ECG Classification Based On Spiking Neural Networks, Feb 2018

Johan Mes(ME), Design Space Exploration of a Neuromorphic ECG Classification System using a Spiking Self-Organizing Map, Sept 2018

Reynaldi Cangga Putra (ME), Area Minimization of DTB Multiplexer; A Chip Component with High Wire Density and Congestion, March 2019

Joris Coenen(ME), A Highly Concurrent, Memory-Efficient AER Architecture for Neuro-Synaptic Spike Routing, April 2019

Ramkoemar Bhoera (ES), A Real-time Low Latency Signal Concentrator for Ship Tracking using AIS, June 2019

Ninad Joshi (ES), N-Shot Training Methodology , Oct 2019

Shashanka Marigi Rajanarayana (CE), SASCNN : A Systolic Array Simulator for CNN , Nov 2019

Joppe Lauriks(CE), A Object Detecting Architecture using Spiking Neural Networks, Nov 2019

Davide Spessot (CE), Design Space Exploration of a Spiking LSM Classifier for RADAR applications, Dec 2019

Martijn van Wezel (CE), A robust modular spiking neural networks training methodology for time-series datasets, Oct 2020

Luuk de Gelder(ES), Population Step Forward Encoding Algorithm Jan 2021

Randy Prozee(ES), Sound-recognition using Spiking Neural Networks Feb 2021

Pai LI (EE), Physical Characterization of Asynchronous Logic Library Aug 2021

Shreya Sanjeev Kshirasagar (EE), Mapping of Spiking Neural Network Topologies on Neuromorphic Hardware Aug 2021

Roy Arriëns (CE), A Spiking Neural Network classification architecture for spatial-temporal data processing Aug 2021

Preetha Vijayan (EE), Brain-inspired Compressed-Inference for Event-Driven Neuromorphic Processors Aug 2021

S.A. Hijlkema (CE/ES), Efficient implementation of an audio preprocessing algorithm for SNN keyword spotting Aug 2021

Fang Yang (EE), Designing Asynchronous Gate Library with new System Level Trade-offs Aug 2021

Zep Kleijweg (ES), Hybrid Posit and Fixed Point Hardware for Quantized DNN Inference Sept 2021

Tanmaj Manjunath (EE), Temporal Synchronization of Sensors Oct 2021

Hanyu Ma (CE), Hardware Spiking Neural Network based Sbox AES Nov 2021

Bas Otterloo (CE), Spiking CA-CFAR Implementation for Radar Target Detection Nov 2021

Jan Maarten Buis(ES), Memristors and Ferroelectric Memory as Weight Storage for Neuromorphic Circuits Mar 2022

Yongkang Zhou(EE), Modeling of router structure for SNN-applicable NoC definitions Apr 2022

Yichen Yang(EE), Off-chip Self Timed SNN Custom Digital Interconnect System Nov 2022

Jinyun Long(CE), Mapping of Spiking Neural Network Architecture using VPR Nov 2022

Jinyao Zhang(EE), Self-timed interconnect for SNN - From Point to Point Communication to Multi-array Segmented-bus solution Nov 2022

Longxing Jiang(EE), A New Logarithmic Quantization Technique and Corresponding Processing Element Design for CNN Accelerators Nov 2022

Tianyu Du(EE), Digital self-timed neuron design for Spiking Neuron Networks Jan 2023

Jiongyu Huang (EE), On-chip Self Timed SNN Custom Digital Interconnect System Jan 2023

International Exchange Students

Daniel Allan Farnes, AVR Interface blocks: Key matrix, motor control, December 2003

W.E. Bauer, LEON Sparc IDE/Flashcard interface development, Sept 2002

P.S. Clarke, LEON infrastructure /software support, Dec 2002

F. Miletic, LEON Sparc co-processor development, Apr 2002


T. Mitsuyoshi, Tk/TCL tool support for XESS FPGA boards, November 2001

D. Sen, SystemC I2C, Aug 2001

T. Brunner, LCD software interface for LEON/MP3 player, Dec 2000

L.E. Pinheiro Malere, LDAP and the NELSIS franework, Aug 1999

S. Eccles, JAVA API for NELSIS, June 1998

C. Johansson, Convert HTML documents to MS Word documents, June 1998

J.A.G. Szymanski, HTML � MS-Access interface, November 1998,

Mercedes Etechnique, Nelsis System � Design of a NELSIS storage component, February 1998

M.A. Sammut, HTML/CGI search scripts, October 1997

E. Bouzianes, Netscape plugins for the NELSIS framework, November 1997

K. Fischer, Java/HTML/Netscape plugins, 1997

D. de Almeida Camargo, NELSIS Access Control Browser, November 1994

Michiel Tromp, NELSIS Language for FlowMaps, 1997

Pepe Navarro, Desiging and development of an embedded system for image acquisition, storing and displaying, 2013