Nick van der Meijs received the M.Sc. Degree in Electrical Engineering (cum laude) from the Delft University of Technology in Delft, the Netherlands. In August 1985, he joined the Network Theory Section of the Department of Electrical Engineering at the Delft University of Technology, to work as a research assistant under the supervision of Prof. P.M. Dewilde. In 1992 he obtained his Ph.D. Degree in Electrical Engineering, the title of his thesis was ``Accurate and Efficient Layout Extraction''. He became an assistant professor in 1990 and an associate professor in 1998. In 1993 he received a Dfl. 2.000.000 (almost 1.000.000 euro) ``Pionier'' (Pioneer) grant from the NWO (Netherlands Organization for Scientific Research) for research on physical modeling and verification of integrated circuits.
He has conducted research into various topics, including module generation, frameworks and physical design verification. He has contributed extensively to the design and implementation of the Nelsis/Ocean IC design system and the SPACE layout to circuit extractor. He is leading a group performing research on modeling and verification of parasitic effects in advanced integrated circuits. His research interest is in the field of efficient (practical) algorithms for electronic design automation, ultra-deep-submicron design and in modeling and extraction of physical/electrical effects in large integrated circuits.
He has designed and taught several courses from freshman to graduate level. Currently he teaches Introduction to Integrated Circuit Design (BSc level), Introduction to Electronic Design Automation (MSc level) and Digital VLSI Design (MSc Level). Previously he taught a.o. Circuit Theory as well as Circuit Modeling.
As the Director of Studies in EE, he is responsible for the content, organisation and quality of the BSc and MSc curricula in Electrical Engineering at TU Delft.