dr. Yu Bi
Signal Processing Systems (SPS), Department of Microelectronics
PhD thesis (Jul 2012): Sensitivity Modeling of On-chip Capacitances: Parasitics Extraction for Manufacturing Variability
Promotor: Patrick Dewilde, Nick van der Meijs
Expertise: VLSI design verificationThemes: VLSI design verification
Yu Bi was a PhD student of prof. Patrick Dewilde and dr. Nick van der Meijs, working on VLSI design verification, in particular parasitic capacitance extraction.
Last updated: 8 Nov 2014